OVERVIEW: llvm system compiler
USAGE: llc [options]
OPTIONS:
-O= - Optimization level. [-O0, -O1, -O2, or -O3] (default = '-O2')
-agg-antidep-debugdiv= - Debug control for aggressive anti-dep breaker
-agg-antidep-debugmod= - Debug control for aggressive anti-dep breaker
-aggressive-ext-opt - Aggressive extension optimization
-alpha-align-all - Align all blocks
-arm-adjust-jump-tables - Adjust basic block layout to better use TB[BH]
-arm-reserve-r9 - Reserve R9, making it unavailable as GPR
-arm-reuse-frame-index-vals - Reuse repeated frame index values
-arm-use-movt -
-arm-use-neon-fp - Use NEON for single-precision FP
-asm-verbose - Add comments to directives.
-avoid-hazards - Enable exact hazard avoidance
-break-anti-dependencies= - Break post-RA scheduling anti-dependencies: "critical", "all", or "none"
-code-model - Choose code model
=default - Target default code model
=small - Small code model
=kernel - Kernel code model
=medium - Medium code model
=large - Large code model
-color-ss-with-regs - Color stack slots with free registers
-combiner-alias-analysis - Turn on alias analysis during testing
-combiner-global-alias-analysis - Include global information in alias analysis
-cppfname= - Specify the name of the generated function
-cppfor= - Specify the name of the thing to generate
-cppgen - Choose what kind of output to generate
=program - Generate a complete program
=module - Generate a module definition
=contents - Generate contents of a module
=function - Generate a function definition
=functions - Generate all function definitions
=inline - Generate an inline function
=variable - Generate a variable definition
=type - Generate a type definition
-dead-split-limit= -
-debug - Enable debug output
-debug-buffer-size= - Buffer the last N characters of debug outputuntil program termination. [default 0 -- immediate print-out]
-debug-only= - Enable a specific type of debug output
-debug-pass - Print PassManager debugging information
=None - disable debug output
=Arguments - print pass arguments to pass to 'opt'
=Structure - print pass structure before run()
=Executions - print pass name before it is executed
=Details - print pass details when it is executed
-disable-16bit - Disable use of 16-bit instructions
-disable-branch-fold - Disable branch folding
-disable-cgp - Disable Codegen Prepare
-disable-code-place - Disable code placement
-disable-cross-class-join - Avoid coalescing cross register class copies
-disable-early-taildup - Disable pre-register allocation tail duplication
-disable-excess-fp-precision - Disable optimizations that may increase FP precision
-disable-fp-elim - Disable frame pointer elimination optimization
-disable-ifcvt-diamond -
-disable-ifcvt-simple -
-disable-ifcvt-simple-false -
-disable-ifcvt-triangle -
-disable-ifcvt-triangle-false -
-disable-ifcvt-triangle-false-rev -
-disable-ifcvt-triangle-rev -
-disable-jump-tables - Do not generate jump tables.
-disable-lsr - Disable Loop Strength Reduction Pass
-disable-machine-licm - Disable Machine LICM
-disable-machine-sink - Disable Machine Sinking
-disable-mmx - Disable use of MMX
-disable-post-ra - Disable Post Regalloc
-disable-red-zone - Do not emit code that uses the red zone.
-disable-rematerialization -
-disable-spill-fusing - Disable fusing of spill code into instructions
-disable-ssc - Disable Stack Slot Coloring
-disable-tail-duplicate - Disable tail duplication
-disable-verify - Do not verify input module
-enable-arm-3-addr-conv - Enable ARM 2-addr to 3-addr conv
-enable-arm-mcinst-printer - enable experimental asmprinter gunk in the arm backend
-enable-correct-eh-support - Make the -lowerinvoke pass insert expensive, but correct, EH code
-enable-eh - Emit DWARF exception handling (default if target supports)
-enable-finite-only-fp-math - Enable optimizations that assumes non- NaNs / +-Infs
-enable-fp-mad - Enable less precise MAD instructions to be generated
-enable-full-load-pre -
-enable-legalize-types-checking -
-enable-load-pre -
-enable-machine-cse - Enable Machine CSE
-enable-ppc-preinc - enable preincrement load/store generation on PPC (experimental)
-enable-ppc32-regscavenger - Enable PPC32 register scavenger
-enable-ppc64-regscavenger - Enable PPC64 register scavenger
-enable-pre -
-enable-sign-dependent-rounding-fp-math - Force codegen to assume rounding mode can change dynamically
-enable-sjlj-eh - Emit SJLJ exception handling (default if target supports)
-enable-tail-merge -
-enable-unsafe-fp-math - Enable optimizations that may decrease FP precision
-f - Enable binary output on terminals
-fast-isel - Enable the "fast" instruction selector
-fast-isel-abort - Enable abort calls when "fast" instruction fails
-fast-isel-verbose - Enable verbose messages in the "fast" instruction selector
-fast-spill -
-filetype - Choose a file type (not all types are supported by all targets):
=asm - Emit an assembly ('.s') file
=obj - Emit a native object ('.o') file [experimental]
=null - Emit nothing, for performance testing
-float-abi - Choose float ABI type
=default - Target default float ABI type
=soft - Soft float ABI (implied by -soft-float)
=hard - Hard float ABI (uses FP registers)
-help - Display available options (-help-hidden for more)
-help-hidden - Display all available options
-ifcvt-fn-start= -
-ifcvt-fn-stop= -
-ifcvt-limit= -
-info-output-file= - File to append -stats and -timer output to
-jit-emit-debug - Emit debug information to debugger
-jit-emit-debug-to-disk - Emit debug info objfiles to disk
-join-liveintervals - Coalesce copies (default=true)
-limit-float-precision= - Generate low-precision inline sequences for some float libcalls
-linearscan-skip-count= - Number of registers for linearscan to remember to skip.
-load= - Load the specified plugin
-march= - Architecture to generate code for (see --version)
-mattr= - Target specific attributes (-mattr=help for details)
-mcpu= - Target a specific cpu type (-mcpu=help for details)
-mips-ssection-threshold= - Small data and bss section threshold size (default=8)
-msp430-hwmult-mode - Hardware multiplier use mode
=no - Do not use hardware multiplier
=interrupts - Assume hardware multiplier can be used inside interrupts
=use - Assume hardware multiplier cannot be used inside interrupts
-mtriple= - Override target triple for module
-new-spilling-heuristic - Use new spilling heuristic
-no-implicit-float - Don't generate implicit floating point instructions (x86-only)
-no-stack-slot-sharing - Suppress slot sharing during stack coloring
-nozero-initialized-in-bss - Don't place zero-initialized symbols into bss section
-o= - Output filename
-pbqp-coalescing - Attempt coalescing during PBQP register allocation.
-post-RA-scheduler - Enable scheduling after register allocation
-postra-sched-debugdiv= - Debug control MBBs that are scheduled
-postra-sched-debugmod= - Debug control MBBs that are scheduled
-pre-RA-sched - Instruction schedulers available (before register allocation):
=default - Best scheduler for the target
=list-burr - Bottom-up register reduction list scheduling
=list-tdrr - Top-down register reduction list scheduling
=source - Similar to list-burr but schedules in source order when possible
=list-td - Top-down list scheduler
=fast - Fast suboptimal list scheduling
-pre-alloc-split - Pre-register allocation live interval splitting
-pre-split-limit= -
-print-failed-fuse-candidates - Print instructions that the allocator wants to fuse, but the X86 backend currently can't
-print-gc - Dump garbage collector data
-print-isel-input - Print LLVM IR input to isel pass
-print-lsr-output - Print LLVM IR produced by the loop-reduce pass
-print-machineinstrs - Print generated machine code
-realign-stack - Realign stack if needed
-regalloc - Register allocator to use (default=linearscan)
=linearscan - linear scan register allocator
=local - local register allocator
=pbqp - PBQP register allocator
-relocation-model - Choose relocation model
=default - Target default relocation model
=static - Non-relocatable code
=pic - Fully relocatable, position independent code
=dynamic-no-pic - Relocatable external references, non-relocatable code
-remat-pic-stub-load - Re-materialize load from stub in PIC mode
-restore-fold-limit= -
-rewriter - Rewriter to use (default=local)
=local - local rewriter
=trivial - trivial rewriter
-schedule-livein-copies - Schedule copies of livein registers
-schedule-spills - Schedule spill code
-shrink-wrap - Shrink wrap callee-saved register spills/restores
-shrink-wrap-dbg - Print shrink wrapping debugging information
=None - disable debug output
=BasicInfo - print basic DF sets
=Iterations - print SR sets for each iteration
=Details - print all DF sets
-shrink-wrap-func= - Shrink wrap the specified function
-soft-float - Generate software floating point library calls
-spiller - Spiller to use: (default: standard)
=trivial - trivial spiller
=standard - default spiller
=splitting - splitting spiller
-split-gep-gvn - Split GEPs and run no-load GVN
-ssc-dce-limit= -
-stack-alignment= - Override default stack alignment
-stack-protector-buffer-size= - Lower bound for a buffer to be considered for stack protection
-stats - Enable statistics output from program
-strong-phi-elim - Use strong PHI elimination.
-t2-reduce-limit= -
-t2-reduce-limit2= -
-t2-reduce-limit3= -
-tail-dup-limit= -
-tail-dup-size= - Maximum instructions to consider tail duplicating
-tail-dup-verify - Verify sanity of PHI instructions during taildup
-tail-merge-size= - Min number of instructions to consider tail merging
-tail-merge-threshold= - Max number of predecessors to consider tail merging
-tailcallopt - Turn fastcc calls into tail calls by (potentially) changing ABI.
-time-passes - Time each pass, printing elapsed time for each on exit
-track-memory - Enable -time-passes memory tracking (this may be slow)
-trivial-coalesce-ends - Attempt trivial coalescing of interval ends
-tweak-phys-join-heuristics - Tweak heuristics for joining phys reg with vr
-unwind-tables - Generate unwinding tables for all functions
-verify-dom-info - Verify dominator info (time consuming)
-verify-loop-info - Verify loop info (time consuming)
-verify-machineinstrs - Verify generated machine code
-version - Display the version of this program
-view-dag-combine-lt-dags - Pop up a window to show dags before the post legalize types dag combine pass
-view-dag-combine1-dags - Pop up a window to show dags before the first dag combine pass
-view-dag-combine2-dags - Pop up a window to show dags before the second dag combine pass
-view-isel-dags - Pop up a window to show isel dags as they are selected
-view-legalize-dags - Pop up a window to show dags before legalize
-view-legalize-types-dags - Pop up a window to show dags before legalize types
-view-sched-dags - Pop up a window to show sched dags as they are processed
-view-sunit-dags - Pop up a window to show SUnit dags after they are processed
-x86-asm-syntax - Choose style of code to emit from X86 backend:
=att - Emit AT&T-style assembly
=intel - Emit Intel-style assembly
-xcore-max-threads= - Maximum number of threads (for emulation thread-local storage)